1. Field of the Invention
The present disclosure relates to a liquid crystal display, and more particularly to, a liquid crystal display which can avoid degradation of picture quality by preventing deviations parasitic capacitance between data lines and pixel electrodes.
2. Discussion of the Related Art
In recent years, liquid crystal displays have been widely used among various types of display devices due to the features such as excellent picture quality, light weight, and low power consumption. A liquid crystal display displays images by controlling the light transmittance of liquid crystals with dielectric anisotropy. The liquid crystal display device includes a liquid crystal panel where liquid crystal cells are arranged in a matrix and a driving circuit for driving the liquid crystal panel.
The liquid crystal panel comprises a thin film transistor array substrate and a color filter array substrate. The thin film transistor array substrate comprises a thin film transistor having a gate electrode, a semiconductor layer, a source electrode, and a drain electrode, a pixel electrode connected to the thin film transistor, and a common electrode which is positioned opposite the pixel electrode to form an electric field with the pixel electrode. The color filter array substrate comprises color filters and a black matrix.
In the liquid crystal display, the liquid crystal panel is driven in an inversion manner in order to prevent deterioration of liquid crystals and improve display quality. Examples of the inversion method include a frame inversion method, a line inversion method, a column inversion method, a dot inversion method, a Z-inversion method, etc.
Of these inversion methods, the Z-inversion method is a method that supplies a pixel signal to data lines in a column inversion manner. In the Z-inversion method, thin film transistors and pixel electrodes are disposed in a zigzag pattern alternately on the left and right sides of the data line. That is, the Z-inversion method is an improved version of the column inversion method, in which circuits are driven in the column inversion manner and the thin film transistors of the liquid crystal panel are arranged in reversed directions for each data line to display an image on a screen in the same way as the dot-inversion method. The Z-inversion method produces an effect similar to the dot-inversion method and brings a drastic reduction in power consumption.
Hereinafter, a related art Z-inversion type liquid crystal display will be described with reference to FIG. 1. FIG. 1 is a top plan view illustrating a pixel array of the related art Z-inversion type liquid crystal display.
Referring to FIG. 1, a thin film transistor array substrate of the related art Z-inversion type liquid crystal display comprises a plurality of gate lines G1 and G2 and a plurality of data lines D1, D2, and D3 which are disposed to cross each other.
Pixel regions are defined by the crossings of the gate lines G1 and G2 and the data lines D1, D2, and D3. Pixel electrodes P1, P2, P3, and P4 are respectively disposed in the pixel regions.
Thin film transistors TFT1, TFT2, TFT3, and TFT4 are disposed at the crossing regions of the gate lines G1 and G2 and the data lines D1, D2, and D3. The thin film transistors TFT1, TFT2, TFT3, and TFT4 are arranged in a zigzag pattern alternately on the left and right sides along the data lines DL1, DL2, and DL3. Accordingly, the pixel electrodes P1, P2, P3, and P4 also are arranged in a zigzag pattern. That is, because the thin film transistors TFT1, TFT2, TFT3, and TFT4 and the pixel electrodes P1, P2, P3, and P4 are alternately arranged on the left and right sides along the data lines D1, D2, and D3, the thin film transistors TFT1 and TFT2 or TFT3 and TFT4 and the pixel electrodes P1 and P2 or P3 and P4, which are placed in a same column area defined by two neighboring data lines D1 and D2 or D2 or D3, are alternately connected to the neighboring data lines D1 and D2 or D2 and D3 for each horizontal line.
However, in the thin film transistor array substrate fabrication of the Z-inversion type liquid crystal display, there may be a process deviation between a source/drain layer forming process for forming data lines DL1, DL2, and DL3, source electrodes SE, and drain electrodes DE and a pixel electrode layer forming process for forming pixel electrodes P1, P2, P3, and P4. When this process deviation causes a shift between the source/drain layer and the pixel electrode layer, it generates a difference in parasitic capacitance between the pixel electrodes P3 and P4 and the data lines D1, D2, and D3.
Hereinafter, the generation of a difference in parasitic capacitance due to a process deviation will be described in detail with reference to FIG. 2. FIG. 2 is a view for explaining changes in parasitic capacitance between a data line and pixel electrodes, caused by a shift between a source/drain layer and a pixel electrode layer. (a) of FIG. 2 is a view showing the data line D2 and pixel electrodes P1 and P2 which are formed in a normal state, (b) of FIG. 2 is a view showing the pixel electrodes P1 and P2 which are shifted to the left side of the figure due to a process deviation, and (c) of FIG. 2 is a view showing pixel electrodes P1 and P2 which are shifted to the right side of the figure due to a process deviation.
Referring to (a) of FIG. 2, the data line D2 is at an equal distance from the pixel electrodes P1 and P2 on the left and right sides, so there is no deviation in parasitic capacitance due to a difference between the distance from the data line D2 to the pixel electrode P1 and the distance from the data line D2 to the pixel electrode P2.
However, as shown in (b) and (c) of FIG. 2, if a pixel electrode P is shifted to one side (e.g., the left or right side) due to a process deviation, it generates a difference between the distance from the data line D2 to the pixel electrode P1 and the distance from the data line D2 to the pixel electrode P2. This produces a deviation in parasitic capacitance due to the difference between the distance from the data line D2 to the pixel electrode P1 and the distance from the data line D2 to the pixel electrode P2.
Moreover, in the Z-inversion type liquid crystal display, the pixel electrodes P1 and P2, placed on the left and right sides of the data line D2, are charged with pixel signals having opposite polarities. Thus, the amount of voltage deviation between the data line D2 (−) and the left pixel electrode P1 (+) having opposite polarities is larger or smaller than the amount of voltage deviation between the data line D2 (−) and the right pixel electrode P2 (−) having the same polarity. Accordingly, this results in a greater deviation between a first parasitic capacitance between the data line D2 (−) and the left pixel electrode P1 (+) and a second parasitic capacitance between the data line D2 (−) and the right pixel electrode P1 (−).
Such a deviation in parasitic capacitance between the data line and the pixel electrodes causes a difference of kickback voltage ΔVp in pixel regions connected to the same data line through Z-inversion driving, thereby leading to a picture quality degradation such as an afterimage or flicker.
Therefore, a need for a liquid crystal display capable of preventing deviation in parasitic capacitance between pixel electrodes and data lines has been raised.